Hello!
I am currently a staff engineer at Qualcomm Technologies Inc., Bengaluru, India. My interests lie at the intersection of semiconductor diagnostics, yield management, data science and machine learning. I lead the development of scan diagnostics methodologies and logic yield ramp of groundbreaking Snapdragon products.
I graduated with a PhD from Department of Electrical and Computer Engineering at Carnegie Mellon University (CMU), USA in 2020 under the guidance of Prof. Shawn Blanton. I pioneered the use of machine learning to enhance logic diagnosis algorithms, and, consequently, accelerate failure analysis and yield learning.
I earned my Bachelor’s degree from the Department of Electronics and Communication Engineering at Indian Institute of Technology (IIT) Roorkee, India in 2014. I have held an internship at GlobalFoundries and Intel in the summers of 2015 and 2016, respectively.
News
- Mar 2025 My patent on Integrated circuit defect diagnosis using machine learning has been granted
- Jun 2024 Achieved 5th Place globally and 1st in India at the Product Development and Test Engineering (PDTE) Summit 2024, Qualcomm
- May 2024 Won the Best Paper Award at Global SOC Summit 2024, Qualcomm
- Dec 2023 Promoted to Staff Engineer, Qualcomm
- Mar 2023 Our book on the use of ML for electronic circuit diagnosis is available online on Springer
- Feb 2023 Permanently moved back to India and joined Qualcomm India Private Ltd., Bengaluru!
- Jan 2023 I am serving in the technical program committee for the ITC and ITC-India.
- Dec 2022 Our book on the use of ML for electronic circuit diagnosis is publishing in Feb 2023, pre-order it on Amazon now!
- Nov 2022 I am serving in the technical program committee for the European Test Symposium (ETS), submit your abstracts by 16-Dec-2022!
- Sep 2022 Presented our paper at the International Test Conference (ITC), Anaheim, CA, USA
- Oct 2021 Check out our paper at the International Symposium for Testing and Failure Analysis (ISTFA), Phoenix, AZ, USA
- Feb 2021 My patent application on Integrated circuit defect diagnosis using machine learning is published
- Aug 2020 Our article is published in the ACM Transactions on Design Automation of Electronic Systems (TODAES)
- Apr 2020 Presented our paper at the VLSI Test Symposium (VTS), San Diego, USA
- Feb 2020 Joined Qualcomm Technologies, Inc., San Diego, CA, USA
- Jan 2020 Defended my PhD thesis at Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA
- May 2019 (2) Won the PhD Forum competition held at the European Test Symposium (ETS), Baden-Baden, Germany
- May 2019 (1) Presented our paper at the IEEE European Test Symposium (ETS), Baden-Baden, Germany
- Apr 2019 (2) Semifinalist in the TTTC’s E. J. McCluskey Best Doctoral Thesis Award Contest held at the VLSI Test Symposium (VTS), Monterey, CA, USA
- Apr 2019 (1) Check out our paper at the VLSI Test Symposium (VTS), Monterey, CA, USA
- Feb 2019 Check out our work in the February 2019 issue of the Electronic Design Failure Analysis (EDFA) Magazine
- Oct 2018 Check out our paper at the International Test Conference (ITC), Washington, D.C., USA
- Apr 2018 Presented our paper at the VLSI Test Symposium (VTS), San Francisco, CA, USA
- Dec 2017 Awarded the Neil and Jo Bushnell Fellowship from Carnegie Mellon University
- Nov 2017 Presented our paper at the Asian Test Symposium (ATS), Taipei, Taiwan
- May 2017 Check out our paper at the European Test Symposium (ETS), Cyprus
- Nov 2016 Presented our paper at the International Test Conference (ITC), Fort Worth, TX, USA
- Nov 2016 Check out our paper at the International Test Conference (ITC), Fort Worth, TX, USA
- May 2016 Check out our paper at the Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, USA
- Mar 2016 Check out our paper at the Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany