Logic Characterization Vehicle Design for Yield Learning

This paper was presented at the Advanced Semiconductor Manufacturing Conference (ASMC), 2016.

Authors: Ben Niewenhuis, Zeye Liu, Soumya Mittal, Shawn Blanton

Summary: A comprehensive investigation of new integrated circuit (IC) design and fabrication technologies is crucial for yielding reliable ICs. This work describes the state of a novel test chip design methodology that results in a test chip referred to as the Carnegie Mellon Logic Characterization Vehicle (CM-LCV).

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